OpenHW Europe WG HW Verification Engineer

The Eclipse Foundation Europe GmbH is hiring for its OpenHW Europe Working Group a HW Verification Engineer. Working as a member of the Eclipse Research Team and closely with the OpenHW Technical Working Group, the candidate will work to verify at industrial-grade open-source IPs based on RISC-V. Through the OpenHW Europe Working Group, we are recruiting for the role of HW Verification Engineer that will primarily contribute to the TRISTAN project and other upcoming research projects.

The TRISTAN (Together for RISc-V Technology and ApplicatioNs) project is a KDT-JU European Union-funded project that aims to expand, mature, and industrialize the European RISC-V ecosystem for the next generation of industrial hardware. This project ensures that it competes with existing commercial/proprietary alternatives. The project will address SW to EDA tools, all the way to RTL components, ensuring a complete stack based on RISC-V.

TRISTAN includes several work packages that cover:

1. Requirements collections of the European market needs
2. Development of industrial-grade CPU and SoC building blocks
3. Software stacks
4. Applications/demo development

A major focus for TRISTAN is to provide European digital sovereignty and access to most of the RISC-V IPs. As such, a significant portion of the developed IP blocks under TRISTAN will be released as open-source IPs. The OpenHW Group ecosystem provides industrial-grade open-source IPs verified to be compliant with a Technology Readiness Level greater than or equal to TRL5.

We are looking for a Hardware Verification Engineer that extends the OpenHW Group ecosystem.

The Role

The OpenHW WG Verification Engineer will work with the research team of the Eclipse Foundation and the OpenHW community to verify at industrial-grade open-source IPs based on RISC-V. The ideal candidate must have prior hands-on experience with CPUs verification processes. The Verification Engineer reports to the Director of Research Relations and works with the OpenHW Group team.

Responsibilities

1. Use SystemVerilog and UVM to create and extend our testbenches: you should know how to verify IPs with random instructions.
2. Use GitHub to integrate and maintain everything open-source on GitHub under core-v-verif.
3. Verify CPUs based on RISC-V.
4. Verify peripherals such as UART, SPI, GPIOs, interrupt controllers, and interconnects.
5. Integrate and extend existing CPUs to support extra features.
6. Integrate and extend new co-processors.
7. Carry out typical development tasks including dissemination, reporting, etc.
8. Support the specific initiatives of the OpenHW Technical Working Group to drive interest, participation, and adoption beyond just the TRISTAN project.
9. Support the broader objectives of the Eclipse Foundation’s European research team, including:
1. Lead the activities of the Eclipse Foundation to support the European research ecosystem, more specifically in the OpenHW Europe working group activities.
2. Initiate and organize dissemination and community-building activities for the projects, leveraging existing Eclipse Foundation initiatives and assets.
3. Facilitate project participation at events such as conferences to benefit the projects.
4. Enable dissemination through web assets, newsletters, and Eclipse-related social media.
5. Complete regular reporting (workload and expenses) as required by the EU processes.
6. Support research project developers in working with the Eclipse Development Process (EDP) and open-source and open hardware best practices.
7. Represent the Eclipse Foundation and OpenHW Europe working group at research project meetings and reviews.
8. Encourage synergies among the EU projects and Eclipse Foundation members.
9. Work fully remotely in a large and global team.

To accomplish the mission above, you should:

Required:

1. Be very confident with SystemVerilog and UVM for use with coverage-driven, constrained-random verification strategies.
2. A working knowledge of:
1. Linux, Make, and Python
2. Computer architectures of general-purpose CPUs
3. Peripheral busses, interrupt controllers, and peripherals such as UART, SPI, and GPIOs
4. A commercial SystemVerilog simulator and associated debug and coverage tools
5. Familiarity with Formal Verification, RTL design, RISC-V ISA, and Git would also be an asset

Education:

A Bachelor’s degree (or higher) in EE or CS with 5+ years of experience. Fluent in English (spoken and written).

Location of Position:

You must be a resident of Italy, France, Spain, Portugal, or Germany.

We offer highly competitive compensation along with a comprehensive benefits package. We thank all applicants for their interest; however, only those to be interviewed will be contacted.

For more information about Eclipse Foundation, please visit our website at https://eclipse.org.

For more information about the OpenHW Group, please visit https://openhwgroup.org.

Eclipse respects the dignity and independence of people with disabilities and is committed to providing accommodation and support to persons with disabilities throughout any recruitment process, once made aware of a need for accommodation. If you require any special accommodation or support during the recruitment process, please indicate in your email to us.