Job Description:
Airbus Defence and Space is looking for a
Airbus and its F-Series partners develop the satellite core avionics for small satellites. For the upcoming Onboard Computers a Flight Software variant shall be integrated and tested onto a ZYNC FPGA/SOC with ARM core.
Location: Friedrichshafen
Start: March 2025
Duration: 6 Months
Your tasks and responsibilities:
Familiarization with the F-Series Flight SW and functions.
Familiarization with the RTEMS-6 RTOS, F-Series Flight SW Framework, HW Abstraction Layer and Board Support Package (BSP) for current ARM CPUs.
Implement 2 SpW ARM/ZYNC/PMOD/CABLE IFs using the F-Series single task SW for testing (SpW/RMAP IP Cores will be provided).
Implement 2 CAN ARM/PMOD/Cable IFs using the F-Series Single Task SW for testing.
Test an end2end flight scenario with full F-Series SW and satellite simulator connected via SpW and simulated Camera connected via CAN.
Implement one RS422 ARM/ZYNC/PMOD/Cable IF and connect to Magnetometer model in satellite simulator.
Documentation of results (MS-Office).
Desired skills and qualifications:
Enrolled student aerospace engineering, software engineering, or comparable graduation.
Profound experience with real-time embedded software (C/C++) and FPGA programming.
High level of motivation for learning and improvement of skills, personal initiative and the ability for efficient timing.
Team spirit and willingness to co-operate and work together in an international Company.
Fluent in English.
Please upload the following documents: cover letter, CV, relevant transcripts, enrollment certificate.
This job requires an awareness of any potential compliance risks and a commitment to act with integrity, as the foundation for the Company’s success, reputation and sustainable growth.
Company: Airbus Defence and Space GmbH
Employment Type: Final-year Thesis
Experience Level: Student
Job Family: Software Engineering