Responsible for design works including but not limited to: CPU design integration work, consistency/MMU/cache work experience, debug/DFX system design work;
Responsible for writing documents at each stage in the process of product development;
Responsible for digital circuit design, RTL coding, verification, synthesis and timing signoff work;
The following relevant experience is preferred: DDR related work experience.
Qualifications:
Master's degree or above in microelectronics, computer, electronic engineering and other related majors, with more than 5 years of relevant work experience;
Familiar with the front-end and back-end processes of chip development;
Rich experience with Verilog, familiar with more than one script language (shell, TCL, Perl, python are acceptable), and experience in common EDA usage;
Have relevant working experience in large chips;
Strong team coordination ability, good at communication and problem solving.