Digital Verification Engineer Semiconductor (all gender)

ALTEN
München
EUR 80.000 - 100.000
Jobbeschreibung

Company Description

We are the designers of today for the world of tomorrow.

As one of the world's leading engineering service providers, we at ALTEN are committed to positively shaping the future of our partners, the careers of our employees and the challenges facing our society and environment.

More than 50,000 employees in 30 countries are already working on innovative solutions in various engineering and IT sectors such as automotive, aerospace, renewable energy, medical technology and railway technology.

Job Description

YOU…

  • verify mixed-signal designs on block and system level resting upon formal and functional verification
  • interpret product requirements to create the verification concept and the product verification specification
  • perform random-constraint testbenches according to the state of the art
  • create assertions to prove the design using formal methods
  • work in collaboration with lab and test engineers, designers, system architects, and verification engineers across multiple sites

Qualifications

YOU…

  • have completed an engineering degree in electrical engineering, computer science, or similar studies
  • already have practical experience in the field of digital functional verification and common safety standards
  • have extensive programming skills in System Verilog and System Verilog assertions
  • have good knowledge of UVM methodology or Specman - e language, scripting languages like Python or Perl, and ability to interpret RTL and Gatelevel code
  • have good communication skills in English
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