Associate III - VLSI (IP Design Verification)

1 Opening
Bayan Lepas

Role Description:

Role Proficiency:

Ability to execute any small to mid-size customer project in any field of VLSI Frontend Backend or Analog design with minimal supervision.

Outcomes:

1. Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc.
2. Independently analyze and complete the assigned task in the defined domain(s) successfully and on-time.
3. On-time quality delivery approved by the project lead/manager.

Measures of Outcomes:

1. Quality verified using relevant metrics by Lead/Manager.
2. Timely delivery - verified using relevant metrics by Lead/Manager.
3. Reduction in cycle time and cost using innovative approaches.
4. Number of trainings attended.
5. Number of new projects handled.

Outputs Expected:

Quality of the Deliverables:

1. Ensure clean delivery of the design and module in terms of ease in integration at the top level.
2. Meet functional spec/design guidelines 100% of the time without any deviation or limitation.
3. Documentation of the tasks and work performed.

Timely Delivery:

1. Meeting project timelines as requested by the program manager.
2. Support the team lead in intermediate tasks delivery.

Team Work:

1. Participation in teamwork; supporting team members/lead at the time of need.
2. Able to perform additional tasks in case any team member(s) is not available.

Innovation & Creativity:

1. Automate repeated tasks to save design cycle time as a necessary approach.
2. Participation in technical discussions.
3. Training.
4. Forum.

Skill Examples:

Languages and Programming Skills: System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, Makefile, Spice (any one).

EDA Tools: Cadence, Synopsys, Mentor tool sets (one or more); Simulators: Lint, CDC/RDC, DC/RTL-C, ICC/Innovus/Olympus, ETS/TK/FS, PT/Tempus, Calibre etc. (any one).

Technical Knowledge: (any one) Partially implement IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verification; Strong in Bus Protocol: AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecture; Strong knowledge in Physical Design / Circuit Design / Analog Layout; Strong understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verification; Strong knowledge of Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design.

Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below.

Strong communication skills; Good analytical reasoning and problem-solving skills with attention to details; Able to deliver the tasks on-time per quality guidelines and GANTT in every instance; Required technical skills and prior design knowledge to execute the assigned tasks; Ability to learn new skills in case required technical skills are not present to a level needed to execute the project.

Knowledge Examples:

Frontend / Backend / Analog Design: Project experience in any of the design by executing any one of RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.; Strong understanding of the design flow and methodologies used in designing.

Understanding of the Technical Specs and Assigned Tasks:

Understand the assigned tasks and have strong knowledge to execute the project tasks assigned by the client/manager as per shown skill.

Additional Comments:

PFB the JD for AMD-Design Verification requirement also find the Video links of UST for your perusal.

Job Description Location: Malaysia Exp: 4+ Yrs Education Qualification: BTech / MTech

The Needed Knowledge and Skills:

1. Good understanding of Verilog / System Verilog.
2. Good understanding of UVM, coverage based verification and constraint random verification.
3. Knowledge of building verification environment - testbench (scoreboard, monitor, agent) at IP and SoC level (reuse from IP level) - building of block level module when needed.
4. Advance verification methods - formal property verification is a plus.
5. Exposure to high speed serial interfaces such as PCIe and USB.

Skills:

VLSI, Verification, Design.

About UST:

UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world's best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients' organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact touching billions of lives in the process.