Senior Staff / Principal Engineer - Chip Verification

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Job Description
In your new role you will:

1. Execute SoC verification tasks and work closely with team members to review and understand the relevant functional and safety-related requirements.
2. Write verification plans to meet these requirements after close alignment with other verification teams for proper work split according to mutually acceptable verification assignment.
3. Execute the verification plan by developing C/C++ test cases and System Verilog/UVM test bench components and by integrating 3rd party VIP components.
4. Simulate and debug at RTL, Unit Delay, and Gate Level using appropriate tools and flows, including Emulator, Portable Stimulus, or Formal methodologies for functional and toggle coverage closure.

For a more senior role, you will also:

1. Lead a team technically through exploring new environments and identifying potential enhancement areas through new methodology.
2. Identify and set mid/long-term goals based on benchmarking against industry standards.

Your Profile
You are best equipped for this task if you have:

1. Masters/Bachelors in Electrical Engineering or Computer Science with 15+ years of relevant work experience.
2. Strong foundational knowledge of digital design & verification.
3. Advanced knowledge and hands-on experience of System Verilog and UVM.
4. Hands-on experience in hardware-software debugging at the system or application level. Hands-on experience with gate-level simulations and debugging/troubleshooting skills is a plus.
5. Exposure to version-controlling (e.g., Git/Bitbucket, ClearCase, CVS, SVN) and bug-management schemes.
6. Dynamic and energetic with a zero-verification escape mindset.
7. Self-motivated, flexible, good communication with interpersonal skills and a good team player who is able to work well with both internal and external partners.
8. Proven ability to achieve results in a very dynamic, multi-site environment and be able to coordinate with priorities and self-initiatives.
9. Knowledge of ISO26262 and ISO21434 are advantageous.
10. Verification experience in COM, CPU peripherals, BUS or pattern development is a plus. Experience in test bench/verification environment setup is also a plus.