Lead Engineer - RTL Design (Senior Staff Engineer level)

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Lead RTL Design Engineer (Senior Staff Engineer level)

Responsibilities

• Own and be responsible for pre-tape out quality for digital SOC modules on the MCU.
• Explore architecture and develop micro-architecture.
• RTL development for IPs and SOCs using Verilog.
• 3rd party IP identification, selection, and integration.
• Collaboration with verification and FPGA teams in test plan development and debug.
• Collaborate with the Physical Design team to close the design on timing and power targets.
• Assist in silicon bring-up and validation.
• Run tool for quality checks (LINT, CDC, and RDC) and fix/waive the issues.

Requirements

• Bachelor’s degree in Electronics Engineering, Electrical Engineering, Instrumentation & Control Engineering, or a related field, plus 10-12 years of experience.
• Possess deep and broad knowledge of current and emerging SOC design technologies.
• Have expert knowledge in designing, implementing, and troubleshooting IPs and SOC.
• Demonstrate a deep understanding of customer needs and the competitive landscape.
• Ability to estimate the impact of and help plan and lead the implementations and have a positive impact on the entire output.
• Can architect and guide programs across the full range of technical areas.

Interested applicants, kindly send in a copy of your updated resume in WORD document to hr@searchstaffing.com.sg stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700