IC Architect (AI & Blockchain)

Adecco is currently representing a US-based Chip Design Firm that is a pioneer in developing and producing ASICs for AI applications. The organization distinguishes itself through the integration of three pivotal technologies: high throughput performance, advanced computational power, and efficient energy management.

We are seeking a Architecture Design Engineer to join the organization and support the ramp-up of their projects.

Responsibilities

Simulator Design

1. Design and develop simulators tailored specifically for AI chip architectures. Utilizing tools like GEM5 or other simulation platforms, the engineer creates accurate models to simulate chip behavior under various AI workloads.
2. Continuous collaboration with both hardware and software teams to refine simulation models, ensuring they closely mirror real-world AI applications. Ensures that any potential bottlenecks or inefficiencies can be identified early, allowing for timely adjustments before the chip's physical design is finalized.

Performance Optimization

1. At the algorithm level, works alongside AI software engineers to optimize computational algorithms, tailoring them to enhance performance on the chip. Modifying algorithms to make them more efficient in executing AI-specific tasks such as machine learning, neural networks, and deep learning.
2. At the architecture level, takes charge of designing and refining the overall chip structure to ensure that it supports the high demands of AI tasks. This involves optimizing key components like memory hierarchies, processing units, and interconnects to deliver high-speed computation with minimal latency.
3. At the circuit level, improves the low-level electrical performance of the chip, focusing on power consumption, speed, and area efficiency. This involves deep expertise in transistor-level design and voltage scaling, ensuring the chip performs optimally without excessive energy consumption.
4. Regular benchmarking and performance analysis are conducted to assess the effectiveness of these optimizations, ensuring that the chip performs to its highest potential under real-world AI workloads.

Front-End Code Development

1. Play a key role in developing front-end code that supports the functionality of the AI chip. This involves writing, testing, and optimizing code to ensure that the chip's design is fully compatible with the software stack intended for AI applications.
2. Collaborate with the software team and ensures that the chip's front-end code integrates properly with AI frameworks like TensorFlow and PyTorch. Eliminate any potential software overhead that could hinder the chip's performance, ensuring that the hardware operates efficiently and as intended with evolving AI models.
3. Responsible for the testing and debugging of the front-end code to ensure its robustness and efficiency, particularly when running large-scale AI models and datasets.

Qualifications

1. Extensive experience in AI chip design and architecture, with a proven track record in developing hardware tailored to AI workloads. Previous experience in AI hardware development is highly preferred.
2. Proficiency in using simulation tools like GEM5, Synopsys, or similar platforms for simulating chip behavior and performance.
3. Strong understanding of AI algorithms and their hardware implementation, with hands-on experience in optimizing algorithms for AI tasks such as deep learning, machine learning, and neural networks.
4. In-depth knowledge of hardware design, with expertise in both high-level architecture design and low-level circuit optimization. Familiarity with power-efficient and high-performance chip design is a must.
5. Expertise in front-end development tools and programming languages such as Verilog, VHDL, C++, or similar languages used in chip design.
6. Deep expertise in digital design, circuit design, and semiconductor technology, including the ability to work on high-performance computing and low-power chip design.

Next Steps:

1. Prepare your updated resume (please include your current salary package with a full breakdown such as base, incentives, annual wage supplement, etc.) and expected package.
2. Apply through this application or send your resume to huiyang.loo@adecco.com in MS Word Copy. We'd love to hear from you!
3. We regret that only shortlisted candidates will be notified.

Loo Hui Yang
Direct Line: 9342 5045
EA License No: 91C2918
Personnel Registration Number: R11011456