Develop verification plans based on design-related documentation, set up the verification environment, and complete verification from module level to system level.
Execute regression testing and enhance verification coverage.
Collaborate with chip design engineers to identify and resolve design defects.
Guide the design team in implementing a verification-friendly design flow.
Perform RTL-level, gate-level, and low-power verification with UPF (Unified Power Format).
Assist FPGA engineers and software engineers in completing FPGA prototype testing.
Ensure the integrity and correctness of chip designs from multiple dimensions.
Requirements
Bachelor’s degree or higher in Computer Science, Electrical Engineering, Communications Engineering.
Experience in design or verification of peripheral modules, communication modules, or SoC systems.
Proficiency in Verilog and expertise in C/SystemVerilog.
Knowledge of one or more scripting languages such as Python, Ruby, Perl, Shell, Tcl, or Makefile.
Experience with UVM (Universal Verification Methodology) is a plus.
Familiarity with the digital chip development process and successful tape-out project experience is an advantage.