Senior DFT Engineer (Foundry Services)

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Job Responsibilities:

• Responsible for developing and simulating testcases, root causing failures to design or test environment issues and verifying fixes, and support of post-silicon debug.
• Working closely with other verification engineers, RTL design engineers, micro-architects, and other team members to ensure quality of test-plans, verification environment, and tests.
• Develops HVM content for rapid bring up and ramp to production on the automatic test equipment (ATE). Applies various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT.
• Optimizes logic to qualify the design to meet power, performance, area, timing, test coverage, DPM, and test time/vector memory reduction goals as well as design integrity for physical implementation.
• Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications.
• Ensures design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Integrates DFT blocks into functional IP and SoC and supports SoC customers to ensure high quality integration of the IP block.
• Collaborates with post-silicon and manufacturing team to verify the feature on silicon, support debug requirements, and document all learnings and improvements required in design and validation.
• Drives high test coverage through structural and specific IP tests to achieve the quality and DPM objectives of the product and develops HVM content for rapid bring up and production on the ATE.

Qualifications:

Minimum Qualifications:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 7+ years of industry experience inclusive of:
• Expert knowledge in industry standard DFT solutions (e.g., Scan/ATPG, Memory BIST/BISR, Logic BIST, iJTAG etc.)
• Experienced in defining DFT architecture, and developing tools/flows/methods for DFT insertion and validation.
• Experienced in DFT timings analysis and SDF-annotated GLS.
• Experienced in supporting post-silicon validation and manufacturing test.

Preferred Qualifications:

• Post graduate degree in Electrical Engineering, Computer Engineering, Computer Science, or in a related field.
• Experienced in mentoring teammates.
• Knowledgeable in adjacent areas of the SoC development process (e.g., synthesis, static timing analysis, formal equivalence checking, etc.)

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Business Group:

Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role:

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances, the work model may change to accommodate business needs.