MTS Silicon Design Engineer(Verification)

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance.

THE ROLE:

Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.

THE PERSON:

• Strong analytical and problem solving skills with a pronounced attention to detail.
• Strong communication, mentoring and leadership skills.
• Skilled at driving team and tasks from start to completion with superior quality.
• Can work well with cross functional teams.

KEY RESPONSIBILITIES:

• The successful candidate will apply current functional verification techniques to perform and improve pre-silicon IP verification quality and product Time to Market for ASIC/SOC design.
• The candidate would involve technically in the porting/creation of the DV environment for the new design, block and IP level test plan creation and implementation, coverage analysis, and regression cleanup.
• Candidate should be able to work independently on various DV tasks and providing technical guidance to the DV team, or even lead a big DV task inside team or cross team.

PREFERRED EXPERIENCE:

• The candidate should have good understanding on ASIC/SOC design and verification flow and should have:
• Over 5 years of digital IP verification with SV/UVM/Formal Verification or new methodology of the industry.
• Good experiences with simulation model creation and testbench build (better with UVM).
• Good logical thinking and expression. Can describe a technical issue/topic to audience not familiar with it.
• Good cooperation cross teams.
• It’s a plus if have one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, PCIe protocol.
• It’s a plus if have f/w writing and debug experience or experience to co-work with f/w team for f/w sequence define in embedded design.
• It’s a plus to be good at some script language, such as Perl, python. Or some database experience (for IP technical info maintain).
• It’s also a plus if have over 2 years’ experience focusing on SV assertion/coverage/formal verification.
• The candidate is expected to exhibit good verbal and written communication skills in English, imaginative thinking and sophisticated analytical techniques, self-driven for quality and timely result, capability to solve complex problems and makes some modifications to standard methods and decision-making on important technical areas.

ACADEMIC CREDENTIALS:

• Bachelor’s degree or higher in Electrical and Electronics Engineering.

LOCATION:

Penang, Malaysia

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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.