Engineers - Principal/ Staff/ Associate Staff

Major Job Description

• Participating in development project with RD Engr and to set-up unit process recipe on available tools / BKM recipe / process flow to meet development success criteria.
• Participating in continuous improvement activities (Defect improvement, Process stability)
• Oversee overall yield improvement activities with the module and YE.
• Work with process engineers on process running condition ( DOE ) versus tool capability.
• Able to communicate well between Module and YE / RD / QA / Etc
• Able to work with YE / RD / CP to develop COT+ / CUSP process flow

Major Responsibilities

• Process Management
• To set-up new process recipe, provide recommendation and integration guidelines to RD Engr and module PE for new development project.
• Coordinate new process or new technology evaluation/discussion between module and YE & R/D Engr.
• To identify process limitations, assess process manufacturability and process integration margin on existing tool for new development.
• Able to Pre review and define COT+ / CUSP before start evaluation.
• Capable to design the DOE to solve the in line / PCM / Sort issue

Yield Improvement

• Utilize Best Know method (BKM) recipe and process flow for the production.
• Reduce unnecessary process step for the production.
• Task Force Team (TFT) participation or involve PSM to solve or improve current production issue.
• Facilitate engineers for problem solving through DOE

POSITION REQUIREMENT

• Qualification: Bachelor Science/ Degree/ Masters / Dr in any Engineering related field
• Experience: Experience in semiconductor to enable the job holder to deal with a wide variety of problems (> 3 years)
• Skills/Competencies: The job holder will be accepted as a technical expert in his own field who is fully competent to handle both routine and non-routine matters.
• Wafer Fab process recipe set-up experience and hands-on skill set below for each headcount:

POSITION 1: IMPLANT TECHNICAL COMPETENCY

• Experience with AMAT VIISTAs & Purion Xe Ion Implanters preferable.
• Good knowledge with CMOS processes and unit process development experience will be added advantage

POSITION 2: DRY ETCH TECHNICAL COMPETENCY

• Experience in Silicon Oxide, Silicon Nitride, and Si/Poly-Si etch process.
• Familiar with AMAT Centura Super-e, AMAT Centura DPS R1 (Poly), AMAT Centura DPS+ (Poly) platform.
• Experience in SiGe etch will be a surplus.

POSITION 3: WET BENCH / FURNACE TECHNICAL COMPETENCY

• Experience in Silicon Nitride, Silicon oxide and Poly wet etch process and wet cleaning process
• Familiar with various wetbench tool type including dipping (DNS/Kaijo), spray (FSI) and backside film removal tool
• Experience in Furnace Deposition process, Silicon Nitride, Polysilicon and Oxidation process. Hands on skill like recipe set-up and process tuning is important.

POSITION 4: THIN FILM HDP/PECVD TECHNICAL COMPETENCY

• Familiar and process hands on experience with Applied Material HDP CVD process / PECVD process on Producer/ Novellus for recipe set-up and fine tuning.
• Familiar and process hands on experience with Applied Material Endura Sputtering System for PVD for recipe set-up and fine tuning.
• Involved in continuous improvement project, process recipe optimization and development.

POSITION 5: PHOTOLITHOGRAPHY TECHNICAL COMPETENCY

• Experience with New module setup and qualification
• Hands on experience with Nikon stepper/scanner and Tel Track Act-8. Including recipe creation, stepper job creation.
• Familiar with 0.11um technology node design rule and KrF RET

Seniority Level
Mid-Senior level

Industry
Semiconductor Manufacturing

Employment Type
Full-time

Job Functions
Engineering

Skills

• Thin Films
• Wet Etching
• CMOS
• Stepper
• Photolithography
• Sputtering
• Plasma-Enhanced Chemical Vapor Deposition (PECVD)
• Dry Etching
• Chemical Vapor Deposition (CVD)
• Polysilicon