Add expected salary to your profile for insights.
In this position, you will be involved in the training, design, and development of the next generation SOC/CPU for a wide range of Intel products and Internet of Things. Your responsibilities will include one or some of the following, but are not limited to:
Assist design unit owner in Register Transfer Level (RTL) model functional validation. Use CAD tools extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions. Verify the circuit behavior against the original simulation model and first silicon.
Define VLSI Structural Design methodology and develop design flows. Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction, and integration. Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability, and power.
Develop Analog IP on next generation deep submicron process for Intel's SOC, perform tasks related to Very-large-scale integration (VLSI) complementary metal-oxide-semiconductor (CMOS) IC design, solid state physics, and physical layout. Such tasks may include circuit design of high-speed clocking related circuits (phase-locked loop (PLL), delay-locked loop (DLL), bandgap) or high voltage input/output (IO) (double data rate (DDR)/LPDDR, general-purpose input/output (GPIO), OPIO).
Responsible for integration of third party IPs -- synthesis, functional and/or timing convergence, and pre and post-silicon debug of IPs developed by various external vendors as well as within the company. Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with memory LPDDR, storage eMMC, SATA, UFS, peripherals PCIe, USB, and MIPI interfaces in SOC devices. System integration dealing with silicon/platform/firmware/middleware/drivers/OS/apps on Android and Windows-based tablets and phones.
Responsible for validating and integrating third party IPs ensuring they meet product specifications and functionality before they are productized into physical chips. Required to work very closely with design teams and architects to implement the low-level RTL design to ensure overall good functionality of the chip. Develop specific test environment/platform, validation methodology, and test plan to validate SOC design by identifying and exercising boundary conditions and special cases in an effort to break the chip to find that last elusive bug.
Oversee definition, design, verification, and documentation for SoC (System on a Chip) development. Determine architecture design, logic design, and system simulation. Define module interfaces/formats for simulation. Perform logic design for integration of cell libraries, functional units, and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contribute to the development of multidimensional designs involving the layout of complex integrated circuits. Perform all aspects of the SoC design flow from high-level design to synthesis, place and route, timing, and power to create a design database that is ready for manufacturing. Analyze equipment to establish operation infrastructure, conduct experimental tests, and evaluate results. May also review vendor capability to support development.
You must possess the below minimum qualifications to be initially considered for this position:
Students pursuing a Bachelor degree in EECS or related major with good CGPA.
Good communication skills and proficient in English.
Knowledge of Unix, VLSI Design, SOC/PC Architecture, and System Verilog is a major plus.
Student / Intern
Shift:Shift 1 (Malaysia)
Primary Location:Malaysia, Penang
Additional Locations:Malaysia, Kulim
Business group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, and all-in-ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person to use our products to focus, create, and connect in ways that matter most to them.
Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Work Model for this Role:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.