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Senior FPGA Design Engineer

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Paignton

Hybrid

GBP 50,000 - 90,000

Full time

3 days ago
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Job summary

An established startup company located in the scenic English Riviera is seeking a skilled FPGA Design Engineer to develop cutting-edge technologies aimed at a sustainable future. This exciting role involves designing high-speed network interface cards, where you will define microarchitecture, implement RTL, and verify designs using SystemVerilog. With a focus on innovation and collaboration, you will be part of a dynamic team in a flexible hybrid working environment. If you are passionate about technology and eager to make a significant impact, this opportunity is perfect for you.

Benefits

Flexible working
Hybrid working
Bonus up to 85%
Exciting technology
Great team environment

Qualifications

  • Extensive hands-on experience in FPGA Design for high-speed applications.
  • Strong knowledge of SystemVerilog, Verilog, and VHDL.

Responsibilities

  • Define microarchitecture and implement RTL for network interface cards.
  • Verify and test designs using SystemVerilog.

Skills

FPGA Design
SystemVerilog
Verilog
VHDL
Python
Tcl
PCIe
CXL
RDMA
DDR4
Ethernet
IP

Education

Relevant degree in engineering

Tools

FPGA tool flows

Job description

Job Description

Based in the English Riviera, this exciting new opportunity will join an established startup company to develop technologies for a sustainable future through ML and Datacentre technologies.

The experience FPGA Design Engineer will be responsible for FPGA Design for the development of high-speed network interface cards. Key responsibilities will include:

  1. Microarchitecture definition
  2. RTL Implementation / synthesis/timing closure
  3. Verification / Testing using SystemVerilog
  4. Delivering & validating FPGA based lab setups for trials

The successful candidate will have a good relevant degree, along with:

  • Extensive hands-on industry experience of FPGA Design for network applications at 100Gbps and above
  • Experience using PCIe, CXL, RDMA, DDR4, bare metal use of high-speed transceivers, Ethernet, IP
  • Comprehensive understanding of clock domain crossing techniques
  • Strong knowledge of FPGA tool flows (synthesis, partitioning, place & route, timing analysis)
  • Excellent skills in SystemVerilog/Verilog/VHDL
  • Scripting in Python / Tcl
  • Driver expertise

The company offers an excellent salary, along with a bonus up to 85%, flexible and hybrid working, exciting technology, and a great team working environment in new offices. Please apply with your CV for more information.

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