Physical Design - UK Reading Cisco Silicon One

Location:

Reading, United Kingdom

Area of Interest:

Engineer - Hardware

Job Type:

Professional

Job Id:

1433535

What You'll Do

You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, and Design Floor Planning.

We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Who You'll Work With

You'll be part of the Cisco Silicon One team, which is at the heart of Cisco’s software and ASIC design efforts.

As part of our team, you’ll contribute to the development of our next-generation network devices—Cisco Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.

Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof.

We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of Cisco's future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility.

Minimum Requirements

• A VLSI Design Engineer with extensive experience in backend design.
• B.Sc./M.Sc. in Electrical Engineering.
• Strong understanding of Place & Route flow.

Preferred/Advantageous Qualifications

• Deep understanding of all aspects of Physical construction and Integration.
• Knowledge in Physical Design Verification methodology LVS/DRC.
• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
• Great teammate, self-learning skills, and ability to work autonomously.

#WeAreCisco, where each person is unique, but together we bring our talents to work as a team and make a difference, powering an inclusive future for all.