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EDA ENGINEER (CHIP DESIGN PROCESS FLOW)-AEROSPACE AND DEFENSE:

Gentrian

London

On-site

GBP 60,000 - 80,000

Full time

30+ days ago

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Job summary

An innovative company in the aerospace and defense sector is seeking an EDA Engineer to revolutionize chip design processes. This role involves designing and translating abstract requirements into integrated circuits, working through various stages including hardware and software design, simulation, and physical implementation. The ideal candidate will have extensive experience in Electronic Design Automation and programming, with a strong background in semiconductor processes. Join a dynamic team focused on high-performance solutions, where your expertise will drive next-generation technology and contribute to groundbreaking advancements in the industry.

Qualifications

  • 15+ years of EDA and CAD flow development experience required.
  • Proficient in programming languages like Python, Shell, and TCL.
  • In-depth knowledge of the chip design process is essential.

Responsibilities

  • Design and translate requirements through integrated circuits.
  • Work on hardware and software design, simulation, and verification.
  • Collaborate with a team to enhance functionality and integration.

Skills

Python
Shell
Perl
TCL
Electronic Design Automation (EDA)
CAD flow development
RTL coding
Semiconductor industry knowledge

Education

Electronic Engineering Degree

Tools

CISSP
CCSP
IASAE
ISSEP
ISSAP

Job description

EDA ENGINEER (CHIP DESIGN PROCESS FLOW) - AEROSPACE AND DEFENSE

Bullisher is a data-centric fintech solution provider in the aerospace and defense industry for institutional-level investors, looking to disrupt and revolutionize a $3 trillion industry. We spearhead an industry-leading Blackbox to facilitate and administer trade agreements, driven by our new generation benchmark delivering solutions through innovation with uncompromising agility.

JOB DESCRIPTION:

The oversight workloads require you to design and translate abstract requirements through integrated circuits for a de-ghosting application & concurrent application. It involves multiple stages, including hardware and software design, simulation or verification, physical and timing analyses, and tape-out. A team of ten will work on added functionality and high levels of integration with advancing technology. This involves revolutionary new storage systems for high performance and high concurrency workloads that will drive next-generation chip designs such as software development, CI, & CD. Areas to cover will include RTL/Circuit design, simulation or verification followed by logic synthesis and then physical implementation checks followed by final tape-out. The usage will be growing exponentially due to smaller geometries and increasing functionality. Our overarching goal is to efficiently handle billions of small files with very high metadata workloads, allowing thousands of compute processes to read or write data concurrently with high performance read, write, and delete capabilities. It also needs to scale to handle increasing data volumes and levels of concurrency. The storage architecture specification is designed from the ground up for high concurrency and high performance environments, requiring exceptional metadata and small and large file performance. It will have no fixed block size and will include inline compression and encryption to decrease the amount of storage needed for blooming datasets. We are a startup enhancing the formation to the early stages of a product development project.

PHYSICAL DEMANDS: This position requires the ability to communicate and exchange information, and utilize equipment necessary to perform the job.

ENVIRONMENT: This position will operate in the following areas of the organization: [ROCKET FUEL] MISSION INTELLIGENCE DIVISION. Innovation, powering speed and space exploration in science systems.

Employees must be legally authorized to work in the UK. Verification of employment eligibility will be required at the time of hire. Visa sponsorship is not available for this position.

QUALIFICATIONS, KEY REQUIREMENTS AND SKILLS SET:

  • Must have an Electronic Engineering Degree.
  • Proven expert in programming languages such as Python, Shell, Perl, TCL.
  • Preferably a Semiconductor industry background.
  • Member of a professional designated body (e.g. IET, InstMC).
  • 15+ years of proven experience in EDA [Electronic Design Automation] flow development and CAD flow development.
  • An in-depth knowledge of the chip design process.
  • Proficient in RTL coding experience.
  • Certified Information Systems Security Professional (CISSP)
  • Certified Cloud Security Professional (CCSP)
  • Information Assurance System Architecture and Engineer (IASAE)
  • Information Systems Security Engineering Professional (ISSEP)
  • Information Systems Security Architecture Professional (ISSAP) is essential.
  • It’s a prerequisite to be certified in one of the listed DoD 8570 Certifications.

INTERVIEW PROCESS:

  • STAGE 1: COGNITIVE ABILITY TEST
  • STAGE 2: COGNITIVE ASSESSMENT SCREENING WITH A 30+ YEARS EXPERIENCE PSYCHOLOGIST
  • STAGE 3: PRE-SCREENING (verification checks & DV security clearance)
  • STAGE 4: INTERVIEW WITH THE CEO, CTO & CHIEF ENGINEER
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