HyperAI : Solutions Edge-AI pour la Caractérisation en Temps Réel des Matériaux en Hyperfréquen[...]

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Université de Savoie Mont-Blanc
Grenoble
EUR 35 000 - 55 000
Faites partie des premiers candidats.
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Description du poste

Organisation/Company: Université de Savoie Mont-Blanc

Research Field: Computer science » Informatics

Researcher Profile: Recognised Researcher (R2), Leading Researcher (R4), First Stage Researcher (R1), Established Researcher (R3)

Country: France

Application Deadline: 30 May 2025 - 22:00 (UTC)

Type of Contract: Temporary

Job Status: Full-time

Is the job funded through the EU Research Framework Programme? Not funded by a EU programme

Is the Job related to staff position within a Research Infrastructure? No

Offer Description

The electrical characterization of materials at hyperfrequencies is essential for understanding their intrinsic electronic structure and charge carrier dynamics. Permittivity and dielectric losses are a major concern in this field, as they directly impact signal integrity and propagation within high-speed electronic systems. Due to the stringent requirements of advanced System-on-Chip (SoC) and System-in-Package (SiP) technologies, in situ measurements are necessary, as manufacturing processes (i.e., solvent deposition, drying, and polishing) can significantly alter the electrical properties of materials, thereby affecting the overall performance of interconnects operating at frequencies from 8 to 20 GHz. Conventional methods typically involve two stages: first, measuring the S-parameters of the structures using a Vector Network Analyzer (VNA), followed by solving the inverse problem through back-simulation (Houzet, 2021). The latter step is computationally intensive, often relying on simulation through finite element methods (such as Ansys HFSS) to address our specific challenges. Conducting such instrumentation remains a significant scientific challenge, particularly due to the high computational effort required and the lack of automation in such a method.

Integrating AI-driven instrumentation could streamline the process, reducing computational load and enhancing the efficiency of inverse problem-solving. A new hardware design is emerging from neural networks implementation with electronic circuits, often named edge AI. Artificial Neural Networks (ANNs) are computational models designed for real-time computing for applications such as classification of material samples through their data characteristics. Spiking Neural Networks (SNNs), also referred to as the third generation of ANNs, are emergent devices that effectively bridge the gap between ANNs and natural intelligence in low-power devices (Shrestha, 2022). This enables the implementation of AI solutions in situ, i.e., as close as possible to the material under test. The implementation of SNNs is performed on neuromorphic processors such as Truenorth (DeBole, 2019), SpiNNaker (Furber, 2014), and Loihi (Orchard, 2021). These solutions fully exploit the sparsity of events and offer remarkable efficiency. However, neuromorphic chips cannot still be considered mainstream in the market due to costs and availability. A low-cost, low-power solution is found on hardware-friendly neural networks in microcontrollers such as TinyOL (Ren, 2021), TinyTL (Cai, 2020), and MCUNet (Lin, 2020).

The main goal of HyperAI is to accurately characterize the complex permittivity of materials using edge-AI solutions for real-time computing. This is approached through a two-stage methodology:

  1. Extraction method using transmission lines (e.g., CPW, CPWG, CPS) is employed on materials with known properties to build a database of measurement data. By varying transmission line types on the same material, we can create a robust dataset suitable for training a neural network, enabling automated and efficient material characterization.
  2. Transform an AI model into a hardware-friendly model. Flexibility, surface area, latency, memory consumption, energy efficiency, and reliability are addressed by this study. An STM32 (B-U585I-IOT02A) and an FPGA (ICE40UP5K-B-EVN) implementation should be investigated.

Début de la thèse: 01/10/2025

Funding category: Contrat doctoral

Concours pour un contrat doctoral

The candidate profile required for the project is a young professional holding a master's degree in Electrical or Electronics Engineering, interested in the scientific field of embedded electronics, microwave, and AI. He/She must be motivated, passionate about research in a multidisciplinary field, and an organized person using scientific methods. He/She must justify good academic tracks in maths and applied physics; an experience in design flow; linguistic competence in English (B2 written and spoken); linguistic competence in French is a plus.

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